Renesas Electronics /R7FA4T1BB /I3C /CMDSPR

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Interpret as CMDSPR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (000)MSRDR0 (000)CDTTIM

MSRDR=000, CDTTIM=000

Description

CCC Max Data Speed R (Read) Register

Fields

MSRDR

Maximum Sustained Read Data Rate

0 (Others): Setting prohibited

0 (000): fscl Max (default value)

1 (001): 8 MHz

2 (010): 6 MHz

3 (011): 4 MHz

4 (100): 2 MHz

CDTTIM

Clock to Data Turnaround Time (TSCO)

0 (Others): Setting prohibited

0 (000): 8 ns or less (default value)

1 (001): 9 ns or less

2 (010): 10 ns or less

3 (011): 11 ns or less

4 (100): 12 ns or less

7 (111): TSCO is more than 12 ns, and is reported by private agreement.

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